Dynamic and steady-state behavior of a paralleling three-phase AC-to-DC converter with reduced dc bus capacitor and nearly unity power factor is investigated in this paper. The circuit is simulated and the simulation results are analyzed and verified by measurements. A 1.5 kW laboratory prototype with small dc bus capacitance 690 μF (0.46 μF /W) is implemented and tested to verify the feasibility of the proposed system. Steady-state and dynamic behavior is the other main advantage of the proposed system. The possibility of using, in the proposed system, a reduced ratio capacitance/watt lower than the typical values used in commercial applications, while maintaining the accurate input current and output voltage regulation, is also theoretically proved.
9 Figures and Tables
Fig. 11 Experimental results of the input voltage and phase currents for steady-state condition of a paralleling three-phase ac-to-dc converter with Co,"'in'm',," = 690J.lF (PI controller kp = I and OJz = ISO).
Fig. 12 Experimental waveforms for transient condition of a paralleling three-phase ac-to-dc converter with Co,"'in'm',," = 690J.lF (PI controller kp = I and OJ, = 150). (a) and (b) input voltage and phase currents.
Fig. 14 shows that the converter gets back its reference voltage within 500f.ls for step load change from 24% (0.36kW) to 100% (l.5kW).
Fig_ 14 Experimental waveforms: (a) dc bus voltage and load current at step load change from 24% (0.36kW) to 100% (1_5kW) and vice versa, (b) closed-up of step load change_
Fig. 5 Closed-up of the output voltage and load current waveforms of a paralleling three-phase ac-to-dc converter when J'..Po is subject to a change from 0.36kW to 1.5kW and vice versa with small dc bus capacitor (Co=690 f1 F).
Fig. 6 Apparent power (S). active power (P) and reactive power (Q) at full-load condition in function of the dc bus capacitance C, (Co,moY = 28,270 !J.F and Co,min = 470!J.F).
Fig. 7 Power Factor (PF) and THD, at nominal input voltage in function of dc bus capacitance Co (Co.max = 28,270 � and Co.m," = 470IlF).
Fig. 8 %b.V;i<"OOP , %b.V;omhml/ , b.tdmop and b.t,omh"o/ in function of dc bus capacitance Co (Co.max = 28,270 � and Co.m," = 470IlF).
TABLE I DESIGN PARAMETERS FOR THE PROPOSED SYSTEM
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